PRODUCTS & SERVICES > COTS DIGITAL / ANALOG PRODUCTS > System-on-Module (SOM) Products > FT232 SOM
  • Features
 
Module built using FT232H is a single channel USB 2.0 Hi-Speed (480Mb/s) to UART/FIFO IC
Onboard one FT232H device, 1 GB DDR3 SDRAM, 64 Mb Dual interface Data Flash, One 10/100 Mbps Fast Ethernet, One Serial EEPROM, One debug RS232 serial communication port
Implemented all Discrete IO logic in the sparten-6 FPGA
All discrete inputs and outputs accessed through registers implemented inside FPGA
Separate JTAG connector provided for programming and downloading of configuration files to the FPGA
Connects to a Printed Circuit Board (PCB) through two 240-pin board-to-board (BTB) connectors
All the signals from SOM are routed to two BTH 240-pin connectors
 

A generic System on Module built using Atmel AT91SAM9263 Processor running at 200 MHz. The card provides basic standard interfaces as shown in the block diagram. The LV-SOM module connects to a Printed Circuit Board (PCB) through two 240-pin board-to-board (BTB) connectors. All the signals from LV-SOM are routed to two BTH 240-pin connectors.

The SOM has 64Mbytes of System memory implemented using two SDRAMs, a NAND Flash of 256 Mbytes, a NOR Flash of 8MBytes and a Serial EEPROM of 512Kbits, SRAM of 4MB as LCD Frame Buffer. This Card Boot-up can be either from Internal ROM, NAND Flash, NOR Flash or SPI Serial EEPROM.

Hardware

A generic System on Module built using Atmel AT91SAM9263 Processor running at 200 MHz. The card provides basic standard interfaces as shown in the block diagram. The LV-SOM module connects to a Printed Circuit Board (PCB) through two 240-pin board-to-board (BTB) connectors. All the signals from LV-SOM are routed to two BTH 240-pin connectors.

The SOM has 64Mbytes of System memory implemented using two SDRAMs, a NAND Flash of 256 Mbytes, a NOR Flash of 8MBytes and a Serial EEPROM of 512Kbits, SRAM of 4MB as LCD Frame Buffer. This Card Boot-up can be either from Internal ROM, NAND Flash, NOR Flash or SPI Serial EEPROM.

Taking advantage of a rich set of peripheral available on-chip the card provides for all the required serial ports, Ethernet ports, Keypad port, LCD port and USB ports. A 4x4 matrix keypad can be interfaced to the card using on-chip keypad scanner. A monochrome STN LCD or Color TFT LCD can be interfaced using an on-chip LCD controller. A full speed Ethernet Port is provided with an on-chip MAC plus external PHY device and the AC‘97 Controller. The card also supports two SPI 2 wire Interfaces, one JTAG/ICE debug interface, one CAN Bus Port, two SDCard/SDIO and Multimedia Card Compliant ports and 4X4 matrix Keypad Interface.

There is an on-board Xilinx XC9500 CPLD, which is customizable to handle various digital IOs and glue logic. A separate JTAG connector is provided for programming and downloading of configuration files to the CPLD.

The card works from a single +3.3V power supply and all the internal Voltages required by various other peripherals are derived using on board regulators and DC-DC Converters.

The card has been designed as a System on Module confirming to SOM-LV form factor and can be used in most of the applications requiring such a medium sized processor with common interfaces.

The further sections of the document, explain in detail the different blocks of the card.

CPU
ARM926EJ-S™ ARM® Thumb® Processor
16 Kbytes Data Cache, 16 Kbytes Instruction Cache, Write Buffer
220 MIPS at 200 MHz
Memory Management Unit
Memories
NOR Flash: 16MBytes
NAND Flash: 256MBytes
SDRAM: 64MBytes
SRAM: 1Mbytes
Serial EEPROM: 512Kbits
LCD Interface
Supports Passive or Active Displays
Up to18 bits per Pixel in TFT Mode, Up to 16 bits per Pixel in STN Color Mode
Up to 16M Colors in TFT Mode, Resolution Up to 2048x2048, and Supports Virtual Screen Buffers
USB Interface
Full Speed (12Mbits per second) Host Double Port
Dual On-chip Transceivers
Integrated FIFOs and Dedicated DMA Channels
USB 2.0 Full Speed (12Mbits per second) Device Port
On-chip Transceiver, 2,432-byte Configurable Integrated DPRAM
Ethernet MAC Interface
Media Independent Interface or Reduced Media Independent Interface.
28-byte FIFOs and Dedicated DMA Channels for Receive and Transmit.
One RMII Ethernet 100-base TX with three status LEDs.
Compatibility with IEEE Standard 802.3
10 and 100 Mbits per second data throughput capability
Full- and half-duplex operations
MII or RMII interface to the physical layer
Register Interface to address, data, status and control registers
DMA Interface, operating as a master on the Memory Controller
Interrupt generation to signal receive and transmit completion
28-byte transmit and 28-byte receive FIFOs
Automatic pad and CRC generation on transmitted frames
Address checking logic to recognize four 48-bit addresses
Support promiscuous mode where all valid frames are copied to memory
Support physical layer management through MDIO interface control of alarm and update time/calendar data in.
Debug Interface
2-wire UART and Support for Debug Communication Channel
20-pin JTAG/ICE interface connector
Reset
On-board Reset and Watchdog Controller
Advanced Interrupt Controller
Individually Mask able, Eight-level Priority, Vectored Interrupt Sources.
Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected.
Multimedia Card Interface
Two SDCard/SDIO/MMC Slots
SDCard/SDIO and Multimedia Card™ Compliant
Automatic Protocol Control and Fast Automatic Data Transfers with PDC.
Synchronous Serial Controllers
Independent Clock and Frame Sync Signals for Each Receiver and Transmitter.
I˛C Analog Interface Support, Time Division Multiplex Support.
High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer.
SPI
Two Master/Slave Serial Peripheral Interfaces (SPI).
8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects.
Two Wire Interface
One Two-wire Interface (TWI).
Master Mode Support,
All Two-wire Atmel EEPROMs Supported.
Timer Counter
This card has three on-chip 16-bit Timer Counter channels.
Each channel can be independently programmed to perform a wide range of functions including frequency measurement, event counting, interval measurement, pulse generation, delay timing and pulse width modulation.
Each channel has three external clock inputs, five internal clock inputs and two multi-purpose input/output signals that can be configured.
JTAG
On-board JTAG header for CPLD programming
On-board JTAG interface to the processor for debugging and development purposes
I/O Interfaces
The card has 8 fully Programmable Input/Output lines. Each I/O line may be dedicated as a general-purpose I/O
Miscellaneous
Provides a Real-Time Timer (RTC)
Supports battery-free boot
Supports an external battery for Real-Time Clock operation
Provides Watchdog Timer feature
Required Power Supplies
1.2V for VDDCORE and VDDBU.
3.3V for VDDOSC, VDDPLL and VDDIOP0 (Peripheral I/Os).
3.3V for VDDIOP1 (Peripheral I/Os).
On-board 1.2V high efficiency step-down Charge Pump regulator with shutdown control.
On-board 3.3V switching regulator with shutdown control.
Mechanical
• Board Dimensions: 59.1mm x 76.2mm
Environmental
Operating Temperature Range: - 20°C to +75°C.
Storage Temperature Range: - 40?C to 85?C.
Warranty
1 year limited warranty
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AdTEC Electronics Inc.
4677 Old Ironsides Drive
Ste 230
Santa Clara, CA 95054
USA
 
AdTEC Electronics specializes in providing end-to-end custom product design & development encompassing System, Mechanical, Board Electronics, Chip design, Firmware and Application Software Engineering. Our design capabilities include design for testability and rugged design to meet both commercial and stringent regulations.
 
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